The optimisation approach achieves a trade-off between the risk of capacity loss and/or excessive cycle time increase caused by tool downs (in case too few tools are dedicated to a particular product/layer) and the probability of having to carry out additional pilot runs (in case more tools than necessary are dedicated to a particular product/layer) by considering four conflicting objectives:
(1) Balancing tool utilisation,
(2) Minimising the risk of no-run-path due to tool downs,
(3) Minimising number of pilot runs,
(4) Minimising resist installation and the associated cost,
thereby considering a wide range of factors that are critical to managing and optimising the lithography area of a fab.
The solution can be used not just to optimise the photo dedication in a high-load situation but also to determine which tools can be shut down temporarily in a lower fab-load situation to achieve cost saving without losing cycle time.
The implementation of the D-SIMCON Photo Optimiser has enabled to free up close to 5% additional photo capacity in the 200mm wafer fab operated by Tower Partners Semiconductor Company (TPSCo) in Japan.
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